Language Features

ParC is the full C++ language with some additions from other languages (particularly Verilog and VHDL). Any existing C/C++ can be mixed with ParC code.

From HDLs

Processes and Tasks

A process is the HDL equivalent of a thread: a block of code that runs continuously. Processes usually suspend and resume on events (described in an @ statement). Processes are class objects, and the process code is esentially a method, that method may defer to another method or "task".

Processes can be independent or belong to a module (see below).

Signals/Drivers and Receivers

Signals represent wires in HDLs and are an inter-process communication mechanism . The interface between a signal and a process for writing is a "driver", for reading is a "receiver". Drivers and receivers are normallly implicit, but in ParC they can be explicit - so that multiple processes can share a driver or receiver, and references can be passed to routines.

A signal with multiple drivers is a "resolved" signal. The method for resolving the signal value when there are multiple drivers is user defined - see also: Programming Equivalence. ParC supports multi-type resolution by applying conversion functions to driver values so that it can resolve all drivers in the same domain - this is a generalization of the scheme used for mixed-signal simulation in Verilog-AMS.

In the case where there are explicit receivers attached to a signal then the receiver may perform its own resolution of the drivers, this supports wireless communication modeling (where freespace is considered as a signal, and driver/receiver distance etc. are a factor).

Non-Blocking Assignment

Assignments to signals in HDLs can be blocking or non-blocking: a blocking assignment propagates the change immediately (similar to processing a task), a non-blocking assignment schedules the change for some time after the assigning process has suspended. Non-blocking assignments use the operator "@=" or "@ <time> :=" rather than "=".

Fork

The fork statement is a fine grained parallel construct, it just indicates that some statements are executed in parallel. Sometimes it is refered to as fork/join since all threads have to complete (join) before continuing with the parent block.

Modules & Entity/Architecture Instantiation

HDLs generally describe hardware as a static structure of connectivity and processes, while C++ is dynamic (working on a stack with heap storage). The ability to describe a static code hierarchy is key to optimizing parallel code.

From CSP

CSP = Communicating Sequential Processes

Pipes (aka Channels)

A pipe is an asynchronous conservative inter-process communication mechanism, i.e. data written to a pipe persists until read by another process (in FIFO order) and the other processes are not under obligation to read the pipe. As against a signal where the value is actually just the result of the resolution of drivers, and has no history.

ParC uses "pipes" rather than "channels" to avoid confusion with CSP and SystemC constructs called "channels" which have different semantics.

New

Assertion Support

In addition to an "@" statement ParC has an "@?" statement. @?(<expression>) is an event that fires prior to the same event expression with an @, e.g. @(clock) and @?(clock), no other events can interleave. This allows assertions to be tested before processing the man event - all @?(clock) processes are evaluated before any @(clock).